Two people familiar with the matter revealed that TSMC is considering entering the field of advanced memory chip manufacturing. Once implemented, this world's largest wafer foundry will occupy a larger share in the AI hardware supply chain.
Two people familiar with the matter said that at the request of its largest customer, NVIDIA, this Taiwanese chip giant has recently begun to plan a production scheme for a specific advanced storage chip – 3D DRAM. The surge in demand for AI hardware has led to a severe shortage of storage chips and a significant increase in prices, prompting chip design companies such as NVIDIA and Apple to seek new sources of supply. Earlier this year, Apple raised the prices of its end-products on the grounds of increased storage costs.
DRAM refers to Dynamic Random Access Memory, which is used to temporarily store data during processor operations. Traditional DRAM arranges storage units in a single layer, whereas 3D DRAM stacks storage units vertically to achieve higher storage density. Currently, the storage chip market is dominated by Samsung, SK Hynix, and Micron, all of which are also developing 3D DRAM technology. The competition in the next generation of storage manufacturing has already begun.
It is not yet clear when TSMC plans to start production, or how it will obtain the necessary manufacturing facilities. Sources added that TSMC has the option to build new factories.
Insiders also mentioned that TSMC is simultaneously exploring another option: acquiring existing factories and converting them into storage production lines. Micron has adopted a similar approach; in March of this year, Micron acquired one of TSMC's factories for $1.8 billion, with plans to convert it for the production of advanced storage chips.
TSMC's factory layout and production capacity will determine how soon it can compete with established memory manufacturers. TSMC produced conventional memory chips from the 1990s to the late 2000s, and before the second quarter of 2008, the company's financial reports still disclosed memory business revenue separately.
TSMC responded, "We do not comment on market rumors and speculation. TSMC always focuses on its core business, concentrating on integrated circuit foundry services. Our goal is to be a trusted technology and capacity provider in the global logic chip industry in the long term." NVIDIA has not yet responded to requests for comments.
Layout storage business also exposes TSMC to the highly cyclical nature of the semiconductor industry. Historically, shortages in storage have often led to manufacturers scaling up production, but by the time the additional capacity is put into use, demand has usually already declined, leading to lower prices and eroding manufacturers' profit margins. This cycle of sharp fluctuations could cause TSMC to slow down its storage projects, especially if supply increases and demand weakens in the coming quarters.
According to informed sources, TSMC's storage project is led by Vice President Hsu Kuo-chin. He is in charge of advanced packaging operations, a technology that allows multiple chips to be integrated into a highly integrated system. His resume indicates that Hsu Kuo-chin has previously managed Micron's Taiwan operations and possesses experience in both storage manufacturing and chip integration.
TSMC's advancement in its storage business faces another contradiction: in 2024, it collaborated with SK Hynix, where TSMC provided the manufacturing process to produce the underlying base chips for Hynix's next-generation high-bandwidth memory (HBM). HBM transmits data at high speed to AI processors by stacking multiple storage chips, and the base chips are responsible for the interconnection management.
TSMC has been researching storage technology for many years and holds a number of patents related to vertical DRAM. The solution involves stacking storage structures on top of each other to fit more storage units within a single chip.
However, it may take several years to transition from technology development to stable, large-scale mass production, and this is especially true for 3D DRAM. Adding more layers increases the manufacturing difficulty and the risk of lower yield rates; Samsung, SK Hynix, and Micron have spent decades refining their processes to achieve low-cost, stable mass production.
Responsible Editor: Jiang Xuesi












